The present invention relates to digital clock systems and more specifically to phase independent frequency comparators generally used in such clock systems.
The relentless quest for performance has driven the development of electronic systems in two directions. First, the dramatic increase of the level of integration on a semiconductor chip that has been achieved in recent years has allowed millions of transistors running at clock frequency values expressed in hundreds of megahertz or gigahertz for particular parts such as switch devices. Secondly, to delay technical limitations, the functions to be executed are often distributed among subsystems to perform tasks in parallel. While this approach reduces system response time drastically, its use requires care concerning operation synchronization. Such a situation is typically encountered in the field of computer networks and telecommunications where the data are processed simultaneously in several subsystems and so, may use several paths. Since most of the communication protocols require preserving the data packet order or the data processing order, it is highly desirable that the time required to perform a same data processing in different paths will be the same in each path. Thus, when each subsystem uses its own clock, it is highly desirable to control that their frequencies are equal. It is to be noticed that phase differences are generally negligible regarding path length and clock frequency and do not substantially affect subsystem response time. Such frequency controls are particularly important when changing system parts.
The most common approach to handle this problem is to adjust the phase of the clocks and then to compare their frequencies. However, such a solution presents several drawbacks. First, it requires hardware to perform both tasks, i.e. phase detection and frequency detection, that is surface consuming and increases the failure rate. Secondly, this solution is not adapted to compare variable frequencies.
It is a broad object of the invention to remedy the shortcomings of the prior art as described hereinabove.
It is another object of the invention to provide a method and circuits to compare clock frequencies without taking into account their phases.
It is a further object of the invention to provide a method and circuits to compare variable clock frequencies without taking into account their phases.
The accomplishment of this and other related objects is achieved by a method of comparing the frequency of a first clock with the frequency of a second clock, using a first and a second circular counters having the same counting range and a comparator, the method comprising the steps of:
initializing the counters with two different values within the counting range;
increasing the content of the first circular counter after each pulse of the first clock;
increasing the content of the second circular counter after each pulse of the second clock; and,
comparing the content of the second circular counter with the content of the first circular counter, where the frequencies of the two clocks are different if the contents of the first and second counters are equal.
Further advantages of the present invention will become apparent to ones skilled in the art upon examination of the drawings and detailed description. It is intended that any additional advantages be incorporated herein.